Performance evaluation of buffered multiple-path ATM switch architectures
نویسندگان
چکیده
The performance analysis of network architectures is a very crucial factor in designing ATM highspeed communications networks. Very often, simulation is the only feasible method because of the nature of the problem and because analytical techniques become too difficult to handle. However simulation can be costly to develop and run. The mathematical analysis approach is preferable but in most cases not applicable. This paper presents an evaluation of buffer Clos network that is based on the analytical simulation method, that has been presented in [6]. The method comprises the probabilistic analysis and the simulation technique with the help of a mathematical software package. The analysis enables us to observe the behavior of various parameters of the network architecture under various traffic conditions.
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